Hardware Verification Engineer

About the role

Teradyne’s Silicon Technology Engineering group is seeking a senior‑level ATE test engineer to develop test programs for new silicon designs, support prototype debug, and drive test time reduction and yield improvement. The role involves close collaboration with design and verification teams to ensure robust ASIC testing.

Key responsibilities

• Define and develop production and characterization tests for ASIC devices on ATE systems.
• Interface with designers, verification engineers, and system engineers to specify DFT requirements.
• Bring‑up and debug tests when ASICs arrive, and work with external vendors on interface boards and probe cards.
• Develop detailed test plans from device datasheets, micro‑architecture specifications, and digital requirement specifications.

Required profile

• Bachelor’s degree in electrical engineering, computer science or a related field.
• 5+ years of ATE test programming experience.
• Strong problem‑solving skills and results‑orientation.
• Excellent communication skills and ability to work with cross‑functional teams.

Required skills

• ATE test programming (e.g., IGXL preferred).
• Scripting languages such as PERL or Python.
• High‑speed board design.
• Knowledge of ASIC devices, DFT, and semiconductor testing processes.

What we offer

• Comprehensive health, dental, vision, life and health insurance.
• Paid vacation and holidays.
• Tuition assistance programs.
• Inclusive and diverse workplace culture.