Experienced IP Logic Design Engineer

About the role

As an IP Logic Design Engineer you will lead the development of high‑performance IP blocks that are integrated into Intel System‑on‑Chip (SoC) products. You will work closely with SoC customers, verification teams and other stakeholders to deliver robust, power‑efficient designs that meet strict performance, area and timing targets.

Key responsibilities

• Develop RTL code, simulation environments and functional verification for IP blocks, functional units and subsystems.
• Define and implement architecture and micro‑architecture features, optimizing for power, performance, area and timing.
• Create and debug RTL designs to ensure correctness before physical implementation.
• Review verification plans, run tests, and resolve issues from failing RTL simulations.
• Collaborate with SoC customers to guarantee seamless integration and high‑quality IP delivery.
• Document technical requirements, design specifications and implementation details.

Required profile

• Bachelor’s degree in a relevant field (or equivalent experience); Master’s degree preferred for reduced experience requirement.
• 5+ years of relevant industry experience (or 3+ years with a Master’s degree).
• Unrestricted, permanent right to work in Costa Rica.
• Intermediate to advanced proficiency in English, both spoken and written.

Required skills

• Proficiency in SystemVerilog and Verilog for RTL development and simulation.
• Hands‑on experience with micro‑architecture design and RTL coding.
• Familiarity with lint tools, UPF low‑power coding, and testbench creation.
• Knowledge of power‑gating and low‑power design techniques.