Signal Integrity Student Worker Engineer

About the role

Intel’s Silicon and Platform Engineering Group is seeking a Physical Design Engineering Undergraduate Intern to support Signal Integrity engineers on high‑speed interconnect architecture for Client, Edge and Physical AI platforms. This hands‑on role offers exposure to physical design flows, signal‑integrity analysis, and manufacturing readiness.

Key responsibilities

• Assist in the physical implementation of package and platform designs, focusing on high‑speed interconnect signal integrity.
• Collaborate with cross‑functional teams to improve design scalability, automation, and manufacturability.
• Participate in verification and sign‑off activities to ensure compliance with performance and manufacturing standards.
• Apply theoretical knowledge to practical projects, including noise‑glitch evaluation and design optimization.

Required profile

• Pursuing a B.Sc. or M.Sc. in Electronics or Electrical Engineering with at least 50% of courses completed.
• Minimum 0‑1 year of hands‑on experience in physical design (internships, academic projects, or coursework).
• Maintain a minimum GPA of 80% and proficiency in written and spoken English.
• Available to work at least 22.5 hours per week for a minimum of one year and have unrestricted permanent right to work in Costa Rica.

Required skills

• Knowledge of electrical simulation tools such as Sigrity PowerSI, SiWave, Hspice, Matlab, or Ansys HFSS.
• Familiarity with PCB design and circuit simulators.
• Experience with statistical analysis tools such as JMP.