ASIC Design Engineer

About the role

Cornelis Networks is seeking an ASIC Design Engineer to develop next‑generation Ethernet ASICs for AI and HPC networking solutions. You will work on cutting‑edge silicon and distributed software systems, helping to push the boundaries of performance at scale.

Key responsibilities

• Implement advanced Ethernet protocols for next‑generation ASICs.
• Write micro‑architecture specifications.
• Define timing constraints for RTL blocks and collaborate with physical design engineers for timing optimization.
• Create block/system level test plans with verification engineers and ensure design coverage.
• Work with hardware, firmware, and software teams to resolve post‑silicon ASIC issues.

Required profile

• B.S. or M.S. in Computer or Electrical Engineering.
• 3+ years of digital design experience.
• Strong verbal and written communication skills.

Required skills

• Proficiency in Verilog and SystemVerilog.
• Experience with timing closure and modern physical design methodologies.
• System‑level debugging and root‑cause analysis.
• Knowledge of Ethernet architecture and networking protocols.
• Experience with multiple clock designs and asynchronous interfaces.

What we offer

• Competitive compensation package including base salary.