ASIC Verification Engineer

About the role

Cornelis Networks is building AI‑first silicon and software for high‑performance computing and networking. The company seeks motivated engineers to work on cutting‑edge ASIC design and distributed software systems that enable AI‑driven performance at scale.

Key responsibilities

• Develop UVM environments to verify RTL at block, unit, and SoC levels.
• Write and execute tests based on verification plans.
• Instrument test benches for functional and code coverage, collect and analyze results.
• Perform formal verification of block‑level RTL.
• Participate in post‑silicon verification activities.

Required profile

• M.S. or B.S. degree in Computer Engineering, Computer Science, or Electrical Engineering.
• 3+ years of post‑college experience in ASIC verification and scripting (TCL, Python, Perl, shell).
• Proven experience validating complex SoCs with multiple clock and reset domains.
• Professional proficiency in English (reading, writing, speaking).

Required skills

• UVM and SystemVerilog.
• TCL, Python, Perl, and shell scripting.
• Formal verification techniques.
• Coverage analysis and instrumentation.

What we offer

• Competitive base salary, performance incentives, and equity participation.
• Comprehensive total rewards package including additional benefits, paid holidays, and flexible work arrangements.