ASIC Design Engineer – Remote (Costa Rica)

About the role

Cornelis Networks is seeking an ASIC Design Engineer to join its fast‑growing team building AI‑first silicon and software for high‑performance networking. The role is fully remote from Costa Rica and focuses on designing next‑generation Ethernet ASICs that power AI and HPC datacenters.

Key responsibilities

• Implement advanced Ethernet protocols for next‑generation ASICs.
• Write micro‑architecture specifications.
• Define timing constraints for RTL blocks and collaborate with physical design engineers for timing optimization.
• Create block and system‑level test plans with verification engineers and ensure design coverage.
• Work with hardware, firmware, and software teams to resolve post‑silicon ASIC issues.

Required profile

• B.S. or M.S. in Computer or Electrical Engineering.
• 3+ years of digital design experience with Verilog and SystemVerilog.
• Experience in timing closure and modern physical design methodologies.
• Strong system‑level debugging and root‑cause analysis skills.
• Excellent verbal and written communication abilities.

Required skills

• Verilog
• SystemVerilog
• Timing closure
• Physical design methodologies
• Ethernet architecture and networking protocols
• Multiple clock domain design
• Asynchronous interface design